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Later in this chapter the PIC18F258 microcontroller is used in a CAN bus–based project. This section describes this microcontroller and its operating principles with respect to its built-in CAN bus. The principles here are in general applicable to other PIC microcontrollers with CAN modules.

The PIC18F258 is a high performance 8-bit microcontroller with integrated CAN module. The device has the following features:

• 32K flash program memory

• 1536 bytes RAM data memory

• 256 bytes EEPROM memory

• 22 I/O ports

• 5-channel 10-bit A/D converters

• Three timers/counters

• Three external interrupt pins

• High-current (25mA) sink/source

• Capture/compare/PWM module

• SPI/I²C module

• CAN 2.0A/B module

• Power-on reset and power-on timer

• Watchdog timer

• Priority level interrupts

• DC to 40MHz clock input

• 8×8 hardware multiplier

• Wide operating voltage (2.0V to 5.5V)

• Power-saving sleep mode

The features of the PIC18F258 microcontroller’s CAN module are as follows:

• Compatible with CAN 1.2, CAN 2.0A, and CAN 2.0B

• Supports standard and extended data frames

• Programmable bit rate up to 1Mbit/s

• Double-buffered receiver

• Three transmit buffers

• Two receive buffers

• Programmable clock source

• Six acceptance filters

• Two acceptance filter masks

• Loop-back mode for self-testing

• Low-power sleep mode

• Interrupt capabilities

The CAN module uses port pins RB3/CANRX and RB2/CANTX for CAN bus receive and transmit functions respectively. These pins are connected to the CAN bus via an MCP2551-type CAN bus transceiver chip.

The PIC18F258 microcontroller supports the following frame types:

• Standard data frame

• Extended data frame

• Remote frame

• Error frame

• Overload frame

• Interframe space

A node uses filters to decide whether or not to accept a received message. Message filtering is applied to the whole identifier field, and mask registers are used to specify which bits in the identifier the filters should examine.

The CAN module in the PIC18F258 microcontroller has six modes of operation:

• Configuration mode

• Disable mode

• Normal operation mode

• Listen-only mode

• Loop-back mode

• Error recognition mode

9.9.1 Configuration Mode

The CAN module is initialized in configuration mode. The module is not allowed to enter configuration mode while a transmission is taking place. In configuration mode the module will neither transmit nor receive, the error counters are cleared, and the interrupt flags remain unchanged.

9.9.2 Disable Mode 

In disable mode, the module will neither transmit nor receive. In this mode the internal clock is stopped unless the module is active. If the module is active, it will wait for 11 recessive bits on the CAN bus, detect that condition as an IDLE bus, and then accept the module disable command. The WAKIF interrupt (wake-up interrupt) is the only CAN module interrupt that is active in disable mode.

9.9.3 Normal Operation Mode 

The normal operation mode is the CAN module’s standard operating mode. In this mode, the module monitors all bus messages and generates acknowledge bits, error frames, etc. This is the only mode that can transmit messages.

9.9.4 Listen-only Mode 

The listen-only mode allows the CAN module to receive messages, including messages with errors. It can be used to monitor bus activities or to detect the baud rate on the bus. For automatic baud rate detection, at least two other nodes must be communicating with each other. The baud rate can be determined by testing different values until valid messages are received. The listen-only mode cannot transmit messages.

9.9.5 Loop-Back Mode

In the loop-back mode, messages can be directed from internal transmit buffers to receive buffers without actually transmitting messages on the CAN bus. This mode is useful during system developing and testing.

9.9.6 Error Recognition Mode 

The error recognition mode is used to ignore all errors and receive all messages. In this mode, all messages, valid or invalid are received and copied to the receive buffer.

9.9.7 CAN Message Transmission 

The PIC18F258 microcontroller implements three dedicated transmit buffers: TXB0, TXB1, and TXB2. Pending transmittable messages are in a priority queue. Before the SOF is sent, the priorities of all buffers queued for transmission are compared. The transmit buffer with the highest priority is sent first. If two buffers have the same priority, the one with the higher buffer number is sent first. There are four levels of priority.

9.9.8 CAN Message Reception 

Reception of a message is a more complex process. The PIC18F258 microcontroller includes two receive buffers, RXB0 and RXB1, with multiple acceptance filters for each (see Figure 9.13). All received messages are assembled in the message assembly buffer (MAB). Once a message is received, regardless of the type of identifier and the number of data bytes, the entire message is copied into the MAB.

Figure 9.13: Receive buffer block diagram

Received messages have priorities. RXB0 is the higher priority buffer, and it has two message acceptance filters, RXF0 and RXF1. RXB1 is the lower priority buffer and has four acceptance filters: RXF2, RXF3, RXF4, and RXF5. Two programmable acceptance filter masks, RXM0 and RXM1, are also available, one for each receive buffer.

The CAN module uses message acceptance filters and masks to determine if a message in the MAB should be loaded into a receive buffer. Once a valid message is received by the MAB, the identifier field of the message is compared to the filter values. If there is a match, that message is loaded into the appropriate receive buffer. The filter masks determine which bits in the identifier are examined with the filters. The truth table in Table 9.3 shows how each bit in the identifier is compared against the masks and filters to determine if the message should be accepted. If a mask bit is set to 0, that bit in the identifier is automatically accepted regardless of the filter bit.

Table 9.3: Filter/mask truth table

Mask bit n Filter bit n Message identifier bit n001 Accept or reject bit n
0 × × Accept
1 0 0 Accept
1 0 1 Reject
1 1 0 Reject
1 1 1 Accept