The mikroC compiler provides a library of commands for initializing, reading, and writing to SD cards. It is not necessary to know the internal structure of an SD card in detail before using one, since the library functions are available. However, a basic understanding of the internal structure of an SD card is helpful in making the best use of the card. In this section we will look briefly at the internal architecture and operation of SD cards.
An SD card has a set of registers that provide information about the status of the card. When the card is operated in SPI mode these are:
• Card identification register (CID)
• Card specific data register (CSD)
• SD configuration register (SCR)
• Operation control register (OCR)
The CID register consists of 16 bytes and contains the manufacturer ID, product name, product revision, card serial number, manufacturer date code, and a checksum byte. Table 7.3 shows the structure of the CID register.
Table 7.3: Structure of the CID register
| Name | Type | Width | Comments |
|---|---|---|---|
| Manufacturer ID (MID) | Binary | 1 byte | Manufacturer ID (e.g., 0x03 for SanDisk) |
| OEM/Application ID (OID) | ASCII | 2 bytes | Identifies card OEM and/or card contents |
| Product Name (PNM) | ASCII | 5 bytes | Product name |
| Product Revision (PRV) | BCD | 1 byte | Two binary coded digits |
| Serial Number (PSN) | Binary | 4 bytes | 32 bits unsigned integer |
| Reserved | 4 bits | Upper 4 bits | |
| Manufacture Date Code (MDT) | BCD | 12 bits | Manufacture date (offset from 2000) |
| CRC-7 Checksum | Binary | 7 bits | Checksum |
| Not used | Binary | 1 bit | Always 1 |
The CSD register consists of 16 bytes and contains card-specific data such as the card data transfer rate, read/write block lengths, read/write currents, erase sector size, file format, write protection flags, and checksum. Table 7.4 shows the structure of the CSD register.
Table 7.4: Structure of the CSD register
| Bytes | |
|---|---|
| Byte 0 | 0 0 XXXXXX |
| Byte 1 | TAAC [7:0] |
| Byte 2 | NSAC [7:0] |
| Byte 3 | TRAN_SPEED [7:0] |
| Byte 4 | CCC [11:4] |
| Byte 5 | CCC [3:0] READ_BL_LEN [3:0] |
| Byte 6 | READ_BL_PARTIAL WRITE_BLK_MISALIGN READ_BLK_MISALIGN DSR_IMP X X C_SIZE (11:10) |
| Byte 7 | C_SIZE [9:2] |
| Byte 8 | C_SIZE [1:0] VDD_R_CURR_MIN (2:0) VDD_R_CURR_MAX (2:0) |
| Byte 9 | VDD_W_CURR_MIN (2:0) VDD_W_CURR_MAX (2:0) C_SIZE_MULT (2:1) |
| Byte 10 | ERASE_BLK_EN SECTOR_SIZE (6:1) |
| Byte 11 | SECTOR_SIZE (0) WP_GRP_SIZE (6:0) |
| Byte 12 | WP_GRP_ENABLE X X R2W_FACTOR(2:0) |
| Byte 13 | WRITE_BL_LEN (1:0) 0 X X X X X |
| Byte 14 | FILE_FORMAT_GRP COPY PERM_WRITE_PROTECT TMP_WRITE_PROTECT FILE_FORMAT (1:0) X X |
| Byte 15 | CRC (6:0) 1 |
| Field definitions | |
|---|---|
| TAAC | data read access time 1 (e.g., 1.5ms) |
| NSAC | data read access time in CLK cycles |
| TRAN_SPEED | max data transfer rate |
| CCC | card command classes |
| READ_BL_LEN | max read data block length (e.g., 512 bytes) |
| READ_BL_PARTIAL | partial blocks for read allowed |
| WRITE_BLK_MISALIGN | write block misalignment |
| READ_BLK_MISALIGN | read block misalignment |
| DSR_IMP DSR | implemented |
| C_SIZE | device size |
| VDD_R_CURR_MIN | max read current at VDD min |
| VDD_R_CURR_MAX | max read current at VDD max |
| VDD_W_CURR_MIN | max write current at VDD min |
| VDD_W_CURR_MAX | max write current at VDD max |
| C_SIZE_MULT | device size multiplier |
| ERASE_BLK_EN | erase single block enable |
| SECTOR_SIZE | erase sector size |
| WP_GRP_SIZE | write protect group size |
| WP_GRP_ENABLE | write protect group enable |
| R2W_FACTOR | write speed factor |
| WRITE_BL_LEN | max write data block length (e.g., 512 bytes) |
| WRITE_BL_PARTIAL | partial blocks for write allowed |
| FILE_FORMAT_GRP | file format group |
| COPY | copy flag |
| PERM_WRITE_PROTECT | permanent write protect |
| TMP_WRITE_PROTECT | temporary write protect |
| FILE_FORMAT | file format |